1. Field of Invention
The present invention relates to a Read Only Memory (ROM) device and, in particular, to a security ROM device for maintaining security of data contents therein.
2. Description of the Prior Art.
Referring to FIG. 1 illustrating a conventional ROM device wherein the input data consists of 4 bits, this ROM device includes a row address buffer 1, a column address buffer 2, a row decoder 3, a column decoder 4, a storage cell array 5, a sense amplifier 6, an output buffer 7, an output enable signal buffer 8, a chip enable signal buffer 9, and a output buffer drive section 10.
In FIG. 1, a function of the storage cell array 5 is to store the user data and a function of the row and column decoders 3 and 4 is to select a desired cell in the storage cell array 5. Generally, the output lines of the row decoder 3 are connected to the respective gates of the cells in the storage cell array 5. The column decoder 4 is connected to the storage cell array 5 and to the sense Amplifier 6 for sensing the information stored in a cell selected by the row and column decoders.
The address signals from the row and column address buffers 1 and 2 are applied to the row and column decoders 3 and 4 respectively and the output signals of the sense amplifier 6 are outputted through the output buffer 7. The output buffer 7 is enabled or disabled by an output enable pin. Also, because the ROM device has a chip enable function, all elements of the ROM device may be controlled by a value of the chip enable pin. The chip enable (CE) signal is typically used in a TTL-CMOS level conversion circuit in which a TTL input signal is converted into a CMOS signal and in the sense amplifier. Also the CE signal may be used to form a signal together with the output of the output enable buffer. For example, because when the chip is disabled by the CE signal from the chip enable pin, the standby current is less than 100 .mu.A. It is possible to disable the sense amplifier, the level conversion circuit, etc. through which the current may flow at that time, by means of the output signal of the chip enable buffer. Also, the output buffer may be disabled. The output buffer drive section 10 enables the output buffer 7 when the output enable signal and the chip enable signal are applied.
In the conventional ROM device described above, because the data are stored in the storage cell array 5, it is possible to read the desired data by means of addresses designating the locations of the memory cells. For example, in the conventional ROM, EPROM, EEPROM, flash EPROM, etc. the data stored in the memory cell array can be easily read by applying addresses to the address pins after maintaining the chip enable and output pins to the desired voltage level. Accordingly, it is very difficult to protect the data from being read by those who want to read the data.
In order to solve such a problem, a ROM device disclosed in U.S. Pat. No. 4,268,911 comprises a permanent register for storing a code having a security function, thereby the contents programed in one ROM can be distinguished from the contents programed in other ROM devices, a test pin for reading the data and selecting a desired mode, and a fuse connected to the test pin.
However, this Patent has problems that the chip size increases because of the permanent register and thus it is difficult to increase the number of permanent register bits. Also, because of using of a test pin, it cannot be applied to the commercially available ROM devices in which there is no test pin in the system user mode.